Frequently Asked Questions
Q: What are the benefits of In-Socket Accelerators (ISA) over PCI, PCI-X, or PCI-Express Cards? A: Since ISAs sit in a CPU socket they have a lower latency, higher performance interconnect to the CPU and/or chipset. This allows the ISA to be a peer to the CPU, handle interrupts, and be a master in the system, something that being a PCI/X/E slot does not allow. HyperTransport offers multiple links at 16 bits at 800MT/s and Front Side Bus is 64 bits at 1066MT/s, which is greater bandwidth than PCI-Express at x4 or x8 and lower latency as well.
Q: What OS can XtremeData In-Socket Accelerators (ISA) work with? A: The XD1000 module currently only supports Linux. The XD2000F only supports Linux. The XD2000i currently only support Linux, but will support Windows soon.
Q: Does XtremeData have a Development System I can start design with? A: Yes, XtremeData has development systems for all of our In-Socket Accelerators. The XD1000, XD2000F and XD2000i Development systems are currently shipping. XtremeData can also customize the platform of your choice to work with our ISA.
Q: Do In-Socket Accelerators work in any computing platform? A: Almost all platforms can take advantage of our In-Socket Accelerators (ISA). They are designed to stay within the size, power, and other specs set forth by the CPU vendors, so almost any place a Opteron or Xeon can fit, a XtremeData ISA will work. We currently have customers using our products in rack mount servers, blades, ATCA cards, and other platforms. In narrow 1u or Blade systems, custom heat-sinks are usually needed. Please contact us directly for any questions you might have on heat-sink needs/requirements.
Q: What is the pricing of In-Socket Accelerators (ISA)? A: A price list can be requested from your local sales rep. You can find a list of sales rep here: (click on read more)
Q: Can XtremeData make a custom module if I require one? A: Yes. Please contact XtremeData to discuss the business terms and requirements for a custom module. Even though we try to deliver a variety of In-Socket Accelerators(ISA), some design require something that our ISA do not have, and XtremeData is willing to explore options to create a differentiating product that is custom fit for you needs using our patent-pending technology.
Q: What speed does the HyperTransport interface work on? A: The XD1000's and XD2000F's HyperTransport interface is 16 bits at 400MHz Double Data Rate for a 800MT/s (Mega-transfers per second)
Q: What is the benefit of having a separate bridge from the appliaction FPGA? A: The In-Socket Accelerators (ISA) with separate bridges offer the following advantages: 1) The static bridge allows users to never have to worry about breaking the bus and crashing the computer. XtremeData has gone to great detail to test, prove, and deliver a solid bridge between your custom logic and the CPU so you do not have to worry about bus protocols. 2) A static bridge allows the user to download new applications into the application FPGA(s) without having to reboot the server, etc.
Q: Can the application FPGAs be reconfigured in system? A: Yes. The XD2000i and XD2000F module have a separate bridge that remains static so users can download new images into the application FPGAs without having to reboot the server. The XD1000 can be reconfigured via software write to FLASH but requires a shutdown in order for the new image to take effect.
Q: How much faster can an In-Socket Accelerator (ISA) make my system? A: In certain applications, our customers have seen anywhere from 2x to 1000x performance increase. For applications that use integer math or floating point operations that are not inherent in a CPU (Double Precision EXP versus a MULT as an example, you can see the most improvement. In addition to performance, In-Socket Accelerators (ISA) offer latency improvements that offer tremendous benefit to the Financial Services Industry, for example. Check our DOWNLOADS section for examples, white papers, and reference designs that show the power of ISAs versus traditional software in an x86 CPU.
Q: Does the socket installation require a bios upgrade or adjustment? A: The XD1000 module requires a modified Linux bios which XtremeData provides. The XDM2000 series of modules are plug-and-play with all “1207” or “Socket F” server blades, and consequently do not require a modified bios.
Q: Can I use the XtremeData XDM2180F or XDM2260i in-socket accelerators in my dual socket “1207” or “Socket F” workstation? A: Yes. Our technology works on multi-socket Opteron, AMD Socket F and Intel Xeon FSB systems. However, we recommend the purchase of our development system which is a tested environment complete with a working reference design.
Q: What motherboards do your FPGA accelerators support? A: XtremeData supports both AMD and Intel based motherboards: • The XDM1000 fits into a multi-Opteron™ based system. • The XDM2000F fits into the AMD Socket F system. • The XD2000i fits into the Intel Xeon DP front-side-bus system.
Q: How does the University Program work? What systems do members of the University Program have access to? A: The first-generation University Program supports academic research in HPC by providing pricing discounts on the necessary hardware and software to begin your research. In order to qualify for the program, you must be a professor at a recognized institution. Upon approval, your program receives an XDS1000 development system. The University Program is currently oversubscribed due to overwhelming feedback from Universities (Thank you!). We encourage you to contact us regarding future programs.
Q: What family of FPGAs does your module support? A: Xtremedata’s XDM1000, XDM2000F and XDM2000i accelerators all use Altera technology. The XDM1000 and XDM2000F uses the StratixII family while the XDM2000i series uses the StratixIII family.
Q: What kind of support do you give for deploying your system? A: In order to enable your solution, XtremeData has fully documented development system which contains all the necessary hardware and software required to begin and complete your design. Our system comes bundled with the Altera QuartusII® tool suite, an OEM version of the ModelTech simulator, an open source Linux device driver, a Linux OS, a reference design and all of the necessary documentation. XtremeData offers three support packages, with each level offering more comprehensive support (see FAQ on support packages). In addition to this, a Service Level Agreement (SLA) is standard practice for XtremeData in order to guarantee that customer expectations are met.
Q: Will the XDS1000 development systems support additional SATA drives? A: XtremeData’s current release of the LinuxBIOS reliably supports one SATA drive per controller. Two drives can be supported if they are from certain vendors, and plugged into certain SATA connectors. For more information on this, please visit the thread at http://www.linuxbios.org/pipermail/linuxbios/2007-September/024937.html.
Q: Why is the boot process hanging on my Sun box during ext3 mount with Linux kernel 2.6.20? A: Try adding noapic to the boot parameters. For continuing information on this bug which is fixed in later kernals, please visit https://bugs.launchpad.net/ubuntu/+source/linux-source-2.6.20/+bug/106063.
Q: Why are the devices on my module not seen on the scan chain? (i.e. Quartus reports that no device is identified). A: Here are the four most common things to look for: 1. The JTAG cable may no longer be connected to the XD1000 - open the box and check that the JTAG is firmly attached the accelerator module. 2. The JTAG cable may be damaged – look for broken connections on the grey ribbon cable or excessive wear. 3. The XD1000 may not be powering up – open the box and check to see that the module’s LEDs light up. If not, please contact our support staff. 4. Perform a continuity check on the fuse for the XDM1000 accelerator board. The fuse is located in the corner of the accelerator board just below the bottom-right corner of the label (white white surface mount device).
Q: Does each development station in a cluster require its own front-end PC for module configuration? A: No, you can use one front-end PC to configure and maintain the all of the development systems in the cluster.
Q: Will the new development system, the XDS2000, still require an external PC for reconfiguration? A: The new development system will support loading/reconfiguring the application FPGA from the target system (no external PC required). But it is recommended that an external PC be used to prevent invalid images from preventing the system from booting.
Q: Does the XD2000 support dynamic reconfiguration of the application image space? A: Yes, the XD2000 supports this feature.
Q: Can the DDR memory attached to the FPGA be directly mapped into system (CPU) memory space such that it can be used by the CPU like any other piece of system memory? A: We tend to use the DDR memory as a private resource for FPGA use only. That is not to say that you could modify the application to allow this, but we have specifically not done because the DDR memory will be slower than access to CPU memory and this could kill application performance (The OS is free to use that memory to run any application). That being said, we do not have plans to implement cache-coherency. If this is a necessity for you and your program, you would need to obtain a license directly from AMD.
Q: Does XtremeData manufacture FPGA-based PCI cards too? A: XtremeData makes accelerator modules which are in-socket replacements for the X86 processors. We considered creating a PCI-based card, but the architectural benefits of being on the same motherboard made designing an in-socket solution clear.
Q: Can I install the Quartus toolset onto the actual development system PC? A: This is not recommended for the XDS1000. We recommend that you use a separate PC as a Quartus interface to the development system.
Q: What Tyan motherboards has XtremeData tested the XDM2000F with? A: S2912 - Phoenix BIOS (supported by open source BIOS) and linux BIOS (supported by XtremeData)
Q: My system powers up and I can program an image to the FPGA on the module, but I cannot get my application working on the module. For example, I’m having problems running the diagnostic tests for the reference design even though the reference design app A: (1) Check that the module is being recognized on the PCI bus by typing ‘lspci’ from the command prompt. You should see the line item for the module appear in the resulting output: 40:01.0 Non-VGA unclassified device: Altera Corporation Unknown device 5844 (rev 01) If you do not see this line item, then attempt to re-seat the module (Remember your static protection!) and go to step (2). If you see this line item, then go to step (3). (2) If re-seating the module does not fix the problem, then we need to determine if there is a hardware problem with the module. The best way of checking this is to revert to a known good image and re-run the ‘lspci’ command. Our recommendation is to use the reference design as this know good image. Please follow these steps: a. Compile the original reference design using Quartus 1. b. Power-up the development system. c. Halt the development system - do not turn it off. d. Download the reference design FPGA configuration file to the XD1000 using the USB Blaster. e. Reset the development system by pressing the red button near the JTAG connector on the back of the system. This button is tied to the motherboard reset and will not power cycle the system, and hence the FPGA will remain loaded during the “warm” boot process. f. Allow the system to boot, open a terminal and run the ‘lspci’ command. The "Altera" device should appear. If it does, then proceed to (3) below. Otherwise, we recommend that the reference design image is re-flashed to the ISA module by following section 4.10 of the ‘XD10000_User_PC_Setup_Procedures.pdf’ document. This will prevent a repeat occurrence upon the next reboot. (3) Check that the project is generating a device interface file ( /dev/xd1000.0). If it is not there, then first try to rebuild xd1000 device driver, and install it manually. This procedure is described in the Development System manual, "XD1000 Development PC Software Environment", chapter "Restoring XD1000 Development Environment". (4) If the manual process doesn't work, the step that fails tells us how to proceed. If it succeeds, then files /etc/rc.d/rc.local and /etc/rc.d/xd1000-setup need to be checked, to verify that the driver is being installed at boot time. /var/log/messages should be checked for errors.
Q: My system is beeping either randomly or after it has been powered up after a while. What does this mean? A: The beeping is a result of the operating system sensing a problem with a peripheral. As such, this could result after programming a bad image to the module. Alternatively, this could be the result of static electricity issues either coupling through the JTAG connection or through a poorly grounded environment. Please use the proper electrostatic precautions (wrist strap, static free carpeting/tile, etc). Some additional measures which may help alleviate this problem is to disconnect the JTAG after programming the application image.
Q: Does the development system connect to the target system? A: The development system can act as the target system, depending upon the processing/interface requirements. These are high-end server machines equipped with tons of memory and the fastest CPUs, so many solutions can be emulated with the box. Note that this is emulation, not just simulation. The processor can have application code running on it real time and communicate with cards in the PCI slots. This allows the user to put in network interface cards (Infini-band, 1GbE, 10GbE) and interface the system to other boxes or racks.
Q: I’m not FPGA savvy. How can I design with your ISAs? A: XtremeData recommends one of two avenues. If you are software savvy, the use of “c-to-gates” tools may be a good choice, depending upon the tasks which you are trying to accelerate. Alternatively, you could rely on our partner network for a “turnkey” experience. Our service partners would handle the project management, milestones, integration and testing, and deliver you an FPGA image.
Q: What type of support packages does XtremeData offer? A: In the case of the development system, XDI has three support packages to help the customer through the integration process (see below). In the case of a partnered solution, XDI provides warrantee, maintenance and licensing agreements on both regular and extended terms to guarantee the functionality of the hardware. If there is a hardware issue (e.g. the module won’t power up), XDI gets involved. If there is an application issue (e.g. the behavior of the app does not meet the requirements), the partner gets involved. XD1000_SUP_PKG_1.0 Includes: Reference Design Support: The reference design is provided by XtremeData as a starting point for customer development. For customers who wish to use this reference design, this support package will provide 1 year of technical support to facilitate understanding of the unmodified reference design. Any development that involves custom modifications to the supplied reference design will fall outside the scope of this level of support. Questions and issues regarding bug fixes or any errors in the reference design or the other products shipped by XtremeData are already covered by the 1 year warranty and are included in the original price of the product. XD1000_SUP_PKG_2.0 Includes: 20 Hours of Engineering Support: This package allows the customer 20 hours of access to XtremeData's engineering resources to address any issues that are not already covered by the warranty. The package expires 1 year after acceptance of the purchase order. Questions and issues regarding bug fixes or any errors in the reference design or the other products shipped by XtremeData are already covered by the 1 year warranty and are included in the original price of the product. XD1000_SUP_PKG_3.0 Includes: 50 Hours of Engineering Support: This package allows the customer 50 hours of access to XtremeData's engineering resources to address any issues that are not already covered by the warranty. The package expires 1 year after acceptance of the purchase order. Questions and issues regarding bug fixes or any errors in the reference design or the other products shipped by XtremeData are already covered by the 1 year warranty and are included in the original price of the product.
Q: We currently use AMD server cards with the “1207” or “socket-F” dual-socket CPUs. Will your AMD ISA work with our system? A: If the BIOS conforms to the “AGESA” standard from AMD, then the ISA socket will simply be a drop-in replacement. The HT core make the ISA a cave device so it should be placed at the end of a chain. The other consideration is which links are connected to the host CPU.
Q: What sockets can the AMD ISA plug into? A: XtremeData ISA’s are only proven in sockets 3 and 4 (the non-IO sockets). If you plug the ISA in the I/O socket, then the drivers for that south bridge will not get loaded. Since the module does not currently support “Tunneling”, it is best to only use our accelerators in the back two sockets. The ISA has the capability to support tunneling, but this feature is not currently supported.
Q: Do the drivers as part of the XDS2000i reference design abstract the interface to Intel’s QuickAssist? A: Yes. Our Monte Carlo demo actually demonstrated the benefits of QuickAssist in addition to the speed-up improvement result from using our accelerators. We were able to successfully disable the ISA (in-socket-accelerator) and QuickAssist automatically ran the algorithm in the CPU, since the accelerator resource was deemed “unavailable”.
Q: Initially I am looking to code up the algorithms in C for rapid prototyping, I do have a VHDL expert at hand however, but I am treating optimization as an iterative step in the design program. Is this a reasonable approach? A: This is actually how we developed our own database product. We designed a software-only version in ‘C’ and ran it on two CPUs. We then offloaded key processes to the FPGA to integrate the accelerator. This approach worked well. In addition, you can also leverage “C-to-Gates” tools like ImpulseC and AutoESL to automatically accelerate CPU cycle intensive tasks in the FPGA.
Q:Does your reference design provide interface logic to move data into and out of the FPGA? A: The reference design provides the hardware interface for moving data (via DMA engines or a direct FIFO inteface). We have also designed a socket standard (XtremeSocket) which will allow you to quickly add custom VHDL/Verilog blocks to this reference design backbone.
Q: Are other clients using your systems having significant performance improvements implementing these systems into their organizations? A: We have publicly announced work with Activ Financial (http://www.activfinancial.com/). They have used our ISAs for feed handling and have seen a dramatic improvement in performance—specifically deterministic performance at much lower latency. In addition to this external reference, XtremeData is also a consumer of the very ISAs that we produce. We used the XDM1000F ISA in our database product, which outperforms the Oracle RAC by 60x. |
